• A
  • arachne-pnr
• B
  • Bitstream
  • blif
• F
  • Flip Flop
  • FPGA
• I
  • iCE40
  • icepack
  • icoprog
  • icoTC
  • icestorm
• L
  • PLB
  • Logic Cell
  • Logic Gate
  • LUT
• N
  • Netlist
• S
  • Synthesis
• P
  • pcf
  • Place and Route
  • PMOD
• R
  • RPi
• V
  • Verilog
  • VHDL
• Y
  • yosys

A

arachne-pnr

Place and Route tool by Cotton Seed available on github. It accepts a netlist in blif format and outputs a textual representation of the Bitstream.

B

Bitstream

As the name suggests, the Bitstram is a stream of bits. It describes the configuration data loaded into an FPGA.

blif

File extension for the Berkley Logic Interchange format used to describe a logic-level circuit in readable form.

F

Flip Flop

Saves a single bit as long as power is supplied.

FPGA

Field programmable gate array.

I

iCE40

An FPGA produced by Lattice with 7680 programmable logic cells and the heart of the icoBoard.

icepack

A tool from the icestorm tool suite to generate a Bitstream from the readable textual representation of the Bitstream.

icoprog

A tool from the icestorm tool suite to flash a Bitstream to the FPGA.

icoTC

The ico tool chain - is a Verilog to Bitstream FPGA tool chain.

icestorm

A toolsuite by Clifford Wolf and Mathias Lasser aimed at documenting the Bitstream of the iCE40 and providing tools for analyzing and creating Bitstreams.

L

PLB

Programmable Logic Block consists of eight logic cells in the iCE40.

Logic Cell

A logic cell consists of one LUT and a Flip Flop is a logic cell in the iCE40.

Logic Gate

Performs a logical operation on one ore more inputs. Has only one logical output.

LUT

Look Up Table, the building block for logic gates. The LUT’s on the iCE40 have four inputs and can therefore store a truth table of size 2^5 = 32.

N

Netlist

A description of the connectivity of an electronic circuit.

S

Synthesis

Synthesis is the generation of a Bitstream from a hardware description like VHDL or Verilog.

P

pcf

File extension for physical constraints file.

Place and Route

Place and route describes several processes where the netlist elements are physically placed and mapped to the FPGA’s physical resources.

PMOD

Peripherial Module Interface, an open standard defined by Digilent. A single PMOD port consists of 6 pins, one ground and one power pin and 4 data pins. The icoBoard comes with 4 double PMOD ports pre populated, this just means two PMOD ports on top of each other. Most PMOD boards use either single or double PMOD ports.

R

RPi

Short for Raspberry Pi, in context of the icoBoard this is alway the Raspberry Pi Model 2 B, which is used as the programmer for the icoBoard.

V

Verilog

A Hardware description language.

VHDL

A Hardware description language.

Y

yosys

Open Synthesis suite by Clifford Wolf on github or the website.